20 beste Stellen als validation engineer in austria – aktuell auf Personalsuche

Embedded Software Integrator
We are looking for a highly motivated embedded software integrator who is passionate about building technology that serves
our customers. You will help develop the next generation of electronic warfare solutions.

You need to have an EU citizenship.

Tasks
• Lead embedded software bring-up on ZCU111 including A53 and R5 cores

Configure Linux or RTOS environments depending on application domain
Integrate and control PL IPs like RF ADC/DAC, DMA engines, and custom RTL logic
Develop interface software and drivers to connect PS and PL components
Coordinate with FPGA design team on memory mapping, AXI interfacing, and performance validation
Manage system boot process including U-Boot, FSBL/SSBL, and device tree setup
Validate full signal and data path from analog RF to software interface

Skills & Experience
• Experience with Xilinx Zynq UltraScale+ RFSoC (ideally ZCU111)

Proficient in multi-core embedded systems (AMP/SMP)
Solid skills in embedded Linux and RTOS (FreeRTOS/bare-metal) development
Familiarity with PetaLinux, Xilinx Vitis/SDK, and Vivado toolchains
Strong understanding of integrating PL IPs: RF Data Converter, AXI DMA, etc
Proficient in embedded C/C++, device tree editing, and bootloader configuration
Skilled in board bring-up and debugging (JTAG, UART, XSDB)
High proficiency in English, German is a plus

Our Offer
• Exciting and challenging tasks in the field of cost-efficient electronic warfare solutions

Opportunity to play a decisive role in the development of our solutions
Small/international team
4-day work week (Monday through Thursday)

Please send your application to: [email protected]

accurision®

Accurision GmbH
Millennium Park 6
6890 Lustenau
Austria

+43 5577 21 700
[email protected]

Nice to Have
• Experience with Linux kernel drivers

and IIO framework

Understanding of real-time data

pipelines and synchronization

Exposure to RF signal chains (GNSS,

radar, SDR, etc.)

Familiarity with FPGA design workflows

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