7 beste Stellen als embedded software – aktuell auf Personalsuche

Senior Formal Verification Engineer - Vector Unit
TechBiz Global GmbH —Wien, W
- Vollzeit
- Homeoffice
- Doktorat
- Master
- Bachelor
Direkt bewerben
3 Std.
Teamleiter Firmware (w/m/d)
Anton Paar GmbH —Graz, ST
5 Tage
Product Owner Fire Alarm (m/w/d)
Schrack Seconet AG —Wien, W
- Vollzeit
Postdoc (f/m/x) in the ALICE 3 outer tracker project
Österreichische Akademie der Wissenschaften —Österreich
- Vollzeit
- Doktorat
- Master
- Bachelor
Senior IT Security Consultant (m/f/d)
beON Consult GmbH („beON“) —Österreich
- Vollzeit
HW Development Engineer (f/m/d)
Diamond Aircraft —Österreich
5 Tage
Field Application Engineer
Arrow Electronics, Inc. —Österreich
- Vollzeit

More jobs to discover

Find similar jobs that you might be interested in.

Teamleiter Firmware (w/m/d)
Anton Paar GmbH —Graz, ST
Fachliche Führung und Mentoring eines kleinen Firmware-Entwicklungsteams sowie Förderung einer Kultur der Qualität und kontinuierlichen Verbesserung.
5 Tage

Ich möchte aktuelle Job-E-Mails für Stellen als embedded software erhalten

Wenn Sie sich bei Ihrem Konto anmelden, stimmen Sie den Nutzungsbedingungen, den Richtlinien zur Verwendung von Cookies sowie der Datenschutzerklärung von SimplyHired zu.

Weitere Job-Standorte erkunden

embedded software jobs near

Jobs als Teamleiter Produktion M W D in Salzburg, S

Jobs als Teamleiter Produktion in Wien, W

Jobs als Teamleiter It in Wien

Jobs als Teamleiter in Vorarlberg

Jobs als Teamleiter in Wien

Jobs als Produktmanager M W D in Gleisdorf, ST

Jobs als Produktmanager, Produktentwickler in Linz, OÖ

Jobs als Produktmanager in 4030 Linz

Jobs als Entwicklungsingenieur Produktmanager Qualitätsingenieur in Vorarlberg

Jobs als Produktmanager in 4020 Linz

Jobs als Produktmanager Bau in Wien

Jobs als Quality Engineer in Linz, OÖ

Jobs als Test Automation Engineer in Wien

Jobs als Mechanical Design Engineer in Wien

Jobs als Verification Engineer in Wien

Jobs als Quality Engineer in Graz, ST

Jobs als Verification Engineer in Unterpremstätten, ST

Jobs als Software Test Engineer in Wien, W

Jobs als Verification Engineer in Graz, ST

Jobs als Hardware Test Engineer in Wien

Senior Formal Verification Engineer - Vector Unit

TechBiz Global GmbH
Wien, W

Direkt bewerben

Details zur Stelle

Vollzeit
vor 3 Stunden

Qualifikationen

Doktorat
Master
Bachelor

Vollständige Stellenbeschreibung

At TechBiz Global, we are providing recruitment service to our TOP clients from our portfolio. We are currently seeking a Senior Formal Verification (FV) Engineer to join one of our clients' teams.

Reporting directly to the Vector Unit Verification Lead, this is a highly technical Individual Contributor (IC) role. In this position, you will be the dedicated formal expert for the VU team, responsible for designing scalable formal testbenches, writing mathematical properties, and ensuring the absolute algorithmic and architectural integrity of our vector pipeline. You will work side-by-side with VU microarchitects to hunt down deep corner-case bugs and achieve formal sign-off on high-complexity arithmetic and execution blocks.

Key Responsibilities

Block-Level Execution & Convergence Engineering (90%)

End-to-End Testbench Ownership: Design, deploy, and maintain robust formal verification environments for complex Vector Unit sub-blocks (e.g., Vector Execution Pipelines, Vector Register File/Rename interfaces, and Vector Floating-Point Units).
Datapath & Arithmetic Verification: Implement advanced word-level modeling, bit-blasting, and algebraic rewriting strategies to verify complex IEEE-754 floating-point and integer vector arithmetic units.
Proof Convergence Management: Independently diagnose and resolve proof-convergence failures, over-constraints, and state-space explosions using advanced reduction techniques (e.g., case-splitting, black-boxing, and abstraction modeling).
RISC-V Vector Compliance: Develop formal environments to mathematically prove that the VU pipeline strictly complies with the RISC-V Vector (V) Extension specification.
Simulation Partnership: Collaborate closely with VU simulation engineers to define a razor-sharp boundary between simulation and formal verification, ensuring maximum bug-hunting efficiency and zero coverage gaps.

Embedded Mentorship & Best Practices (10%)

Formal-Friendly Design: Partner with VU microarchitects during early-stage RTL development to drive formal-friendly coding styles and structural design patterns.
SVA Propagation: Review and refine SystemVerilog Assertions (SVA) written by design and simulation peers, establishing best practices for block-level assertions within the VU team.

Must Have

Education: B.S./M.S. in Computer Engineering, Electrical Engineering, or Computer Science with practical industry execution; or a Ph.D. with a research focus on formal methods or computer arithmetic.
Experience: 5+ years of production-grade hardware verification experience (or Ph.D. + 1–3 years) with a strong, proven track record of applying formal verification to CPU, GPU, or DSP execution pipelines.
Collaboration Style: A self-driven engineer who enjoys deep mathematical puzzles, collaborates seamlessly within a localized block-level team, and can translate complex proof counter-examples into actionable bugs for designers.
Datapath Validation Focus: Strong specialization in arithmetic formal verification, algebraic rewriting, and word-level modeling. Familiarity with control-path formal techniques (liveness, safety properties) is highly welcome.
Vector Microarchitecture: Good working knowledge of high-width execution pipelines, vector execution units, or floating-point/integer arithmetic hardware. Experience with Out-of-Order execution mechanics is a plus.
Formal Tools: Proficient command of commercial EDA formal tools (e.g., Cadence JasperGold/DPV, Synopsys VC Formal, Siemens OneSpin) and their specialized mathematical/datapath apps.
Languages: Native fluency in SystemVerilog and SystemVerilog Assertions (SVA). Scripting proficiency (Python, Tcl, or Bash) for testbench automation.

Nice to Have

RISC-V Core Verification.
RISC-V Ecosystem: Familiarity with the RISC-V Architecture, specifically the Vector (V) and Floating-Point (F/D) extension ecosystems.
Emulation platforms (Veloce, ZeBu).
Core/Bus interface protocols (e.g., AXI/CHI).

Essential Soft Skills

An adversarial, gap-seeking mindset — instinctively asks "who actually checks this?" — with a strong umbrella view of the whole core.
Clear communication across DV, design, and software teams; writes verification plans others can follow.

Direkt bewerben

Erweiterte Suche

embedded software Jobs

Senior Formal Verification Engineer - Vector Unit

Teamleiter Firmware (w/m/d)

Product Owner Fire Alarm (m/w/d)

Postdoc (f/m/x) in the ALICE 3 outer tracker project

Senior IT Security Consultant (m/f/d)

HW Development Engineer (f/m/d)

Field Application Engineer

More jobs to discover

Ich möchte aktuelle Job-E-Mails für Stellen als embedded software erhalten

Related Searches

Weitere Job-Standorte erkunden

Tools für Jobsuchende

Arbeitgebertools

Durchsuchen

Bleiben Sie in Kontakt