4 beste Stellen als system engineer in graz st – aktuell auf Personalsuche

Senior Principal Engineer - PMIC IC Architect (d/m/f)
ams-OSRAM AG —Unterpremstätten, ST
- Vollzeit
- Doktorat
- Master
Digital Design Architect – Silicon IC (f/m/d)
Renesas Electronics —Graz, ST
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- Homeoffice
- Master
- Bachelor
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ZF Foxconn Chassis Modules GmbH —Grambach, ST
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NXP Semiconductors —Gratkorn, ST
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Digital Design Architect – Silicon IC (f/m/d)
Renesas Electronics —Graz, ST
Lead the design and development of digital circuits for custom silicon ICs using RTL (VHDL/Verilog/SystemVerilog). The monthly salary is paid 14 times a year.
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Senior Principal Engineer - PMIC IC Architect (d/m/f)
ams-OSRAM AG —Unterpremstätten, ST
Leading and challenging design reviews, acting as design authority within the analog and power community. Deep involvement in silicon bring up and root cause…

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Senior Principal Engineer - PMIC IC Architect (d/m/f)

ams-OSRAM AG -
Unterpremstätten, ST

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Details zur Stelle

Vollzeit

Qualifikationen

Doktorat
Master

Vollständige Stellenbeschreibung

The CSA division supplies sensors that bridge the gap between the world we live in and the digital world of machines. By converting physical signals - heartbeats, sounds, light waves - into data, we enable robots, cars and other devices to interact with people and improve our world. What drives CSA is a relentless desire to contribute to technology and have a meaningful impact on the world. This business thrives on solving complex problems and partnering with global leaders at the forefront of technological advancement. Our goal: to push the boundaries of sensor technology and empower innovators to make the world smarter, healthier and happier.

As a Sr. Principal Analog Design Engineer (PMIC), you are a senior technical authority within R&D, responsible for defining, designing and validating high performance power management solutions:

Architectural ownership of overall PMIC system after initial concept phase by system solution engineer
Hands on design of complex analog and power blocks, including: LDOs (high PSRR, low IQ, high current), switching regulators (buck, boost, buck boost, charge pumps), power stages using BCD / HV CMOS / DMOS technologies, DC-DC converters and control loops, high voltage / high current devices in BCD processes, references, biasing, protection, monitoring and fault handling circuits, LED Drivers
Definition of top level and high block level specifications considering system constraints and requirements
Expert level simulation and system level verification
Technical guidance of layout for power critical blocks (parasitics, IR drop, EM, ESD, isolation)
Deep involvement in silicon bring up and root cause analysis
Leading and challenging design reviews, acting as design authority within the analog and power community
Cross functional collaboration with design, layout, verification, test, product engineering, technology development and foundry interfaces
Contribution to IP reuse strategies, design quality standards and long term PMIC roadmap
Provide effort estimation for project planning
Mentoring and coaching of junior and senior engineers

Master’s degree or PhD in Electrical Engineering or a related discipline
12+ years of experience in analog / mixed signal IC design with focus on PMICs
Proven expert knowledge in power related analog design, especially: linear regulators (LDOs), DC-DC converters and control loops, high voltage / high current devices in BCD processes, analog building blocks (op amps, references, biasing, POR, protection)
Solid understanding of stability, loop compensation, transient behavior, start up and fault scenarios
Experience with layout aware design, power integrity, thermal aspects and reliability
Track record of successful silicon releases and production support
Strong analytical skills and ability to solve complex multidisciplinary problems
Excellent communication skills and confidence operating at senior technical level
Fluent English required; German is an advantage

We offer competitive salaries and additional benefits based on your performance, experience and qualification. The employment is in accordance with the collective salary and wage agreement for employees of the electrical and electronics industry, employment group H (https://www.feei.at/aktuelles/mindestloehne-und-gehaelter-eei/).
We offer a higher compensation depending on your expertise and skills.

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system engineer Jobs in graz st

Senior Principal Engineer - PMIC IC Architect (d/m/f)

Digital Design Architect – Silicon IC (f/m/d)

Supplier Quality Engineer Intern

Graduate Digital Design Engineer (m/f/d)

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