12 beste Stellen als method validation in wien – aktuell auf Personalsuche

DFT & Post-Silicon Validation
TechBiz Global GmbH —Wien, W
- Vollzeit
- Doktorat
- Master
- Bachelor
Direkt bewerben
Guest Scientist for cell-based immunotherapy project (m/f/d)
CeMM —Wien, W
- Vollzeit
- Doktorat
- Master
Safeguards Information Analyst (Open Source)(P4)
International Atomic Energy Agency —Wien, W
- Master
- Bachelor
Associate Information Analyst (Open Source)(P2)
International Atomic Energy Agency —Wien, W
- Bachelor
13 Tage
VIE - Methods & Tools Junior Engineer
ALSTOM —Wien, W
- Vollzeit
- Master
- Bachelor
Group Audit Specialist (all genders) Payments & AML
Erste Group Bank AG —Wien, W
- Vollzeit
- Homeoffice
- Bachelor
8 Tage
Team Assistant(G4)
International Atomic Energy Agency —Wien, W
9 Tage
University assistant predoctoral
Universität Wien —Wien, W
- Vollzeit
- Doktorat
- Master
- Bachelor
3 Tage
Master Thesis "Meta Learning in Nonlineary Dynamic System Modelling"
Austrian Institute of Technology —Wien, W
- Master
Senior Formal Verification Engineer
TechBiz Global GmbH —Wien, W
- Vollzeit
- Homeoffice
- Doktorat
- Master
- Bachelor
Direkt bewerben
9 Tage
Master Thesis “Bi-Static Sensing of UAVs”
Austrian Institute of Technology —Wien, W
- Master
5 Tage
Product Engineer (f/m/d)
woom Bikes —Wien, W
- Vollzeit
Direkt bewerben
1 Tag

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DFT & Post-Silicon Validation

TechBiz Global GmbH
Wien, W

Direkt bewerben

Details zur Stelle

Vollzeit

Qualifikationen

Doktorat
Master
Bachelor

Vollständige Stellenbeschreibung

At TechBiz Global, we are providing recruitment service to our TOP clients from our portfolio. We are currently looking for a

DFT & Post-Silicon Validation to join one of our clients' team

Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in package? We need you! As a Senior DFT and Post-Silicon Lead, you will own the DFT implementation process, ensuring seamless integration with test and post-silicon validation teams. You will work with cutting-edge technology, collaborating closely with external IP providers, EDA vendors, and internal teams to deliver high-quality, high-performance SoCs or SiPs for mass production.

Key Responsibilities

Leadership & Team Management
Lead and mentor the DFT and Post-Silicon engineering teams to drive innovation and efficiency.
Provide technical direction, ensuring alignment with organizational goals.
Foster a culture of continuous improvement and collaboration.
DFT Strategy & Execution
Define and implement DFT architectures to improve testability, debug capabilities, and manufacturability.
Ensure proper insertion of DFT features such as scan chains, BIST (Built-In Self-Test), and JTAG interfaces.
Optimize DFT methodologies to minimize test time, reduce cost, and improve quality/yield.
Test Development & Implementation
Develop and implement test plans and test strategies at silicon, package, and system levels.
Define and develop automated test solutions for production and characterization.
Ensure test coverage for all product development stages, from pre-silicon to mass production.
Guarantee high yield on the final solution while considering chiplet complexities.
Cross-Functional Collaboration
Work closely with design, validation, packaging, and operations teams to ensure seamless integration of testing and manufacturability.
Collaborate with product management to ensure alignment with customer requirements and timelines.
Process Improvement & Innovation
Continuously explore and implement new DFT methodologies and manufacturing processes.
Lead initiatives for cost reduction, efficiency improvements, and quality enhancements in test and production.

Reporting Structure

Reports to: Physical Implementation Team Manager

Receives reports from: DFT and Post-Silicon team members

Bachelor’s, Master’s, or PhD in Computer Science, Electrical Engineering, or a related field.
Proven experience with multiple tape-outs of high-performance SoCs or SiPs for mass production.
Strong background in post-silicon test optimization and yield analysis.
Experience in defining and implementing test strategies for high-volume production.
Proficiency in RTL and testbench development using SystemVerilog and Verilog.
Strong scripting skills (Shell, Tcl, Python3).
Hands-on experience with Tessent and SSN methods integrated with leading EDA design flows for advanced technology nodes is a plus.

Direkt bewerben

Erweiterte Suche

method validation Jobs in wien

DFT & Post-Silicon Validation

Guest Scientist for cell-based immunotherapy project (m/f/d)

Safeguards Information Analyst (Open Source)(P4)

Associate Information Analyst (Open Source)(P2)

VIE - Methods & Tools Junior Engineer

Group Audit Specialist (all genders) Payments & AML

Team Assistant(G4)

University assistant predoctoral

Master Thesis "Meta Learning in Nonlineary Dynamic System Modelling"

Senior Formal Verification Engineer

Master Thesis “Bi-Static Sensing of UAVs”

Product Engineer (f/m/d)

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